Via current, temperature rise, and manufacturability
A via is not just a connection between layers. It has resistance, heat, plating limits, manufacturing constraints, and current-sharing questions when vias are paralleled.
What matters when current flows through PCB vias?
Check via resistance, voltage drop, power loss, plating geometry, number of parallel vias, current sharing, and manufacturability limits from the board fabricator.
Model summary
- Via voltage drop: Vdrop = I * Rvia.
- Via power loss: P = I^2 * Rvia.
- Parallel vias reduce resistance only if current shares reasonably through the layout geometry.
Worked example
A single via carrying 1 A with 5 mOhm resistance drops 5 mV.
Power loss is 1^2 * 5 mOhm = 5 mW in that via barrel.
If current is higher or thermal rise matters, multiple vias and better copper spreading may be needed.
Calculator status
A dedicated via-current calculator is a future PCB-layout workflow candidate. This explainer captures the engineering model and failure modes to support that future calculator.
Common mistakes
- Assuming many vias share current equally without checking the copper geometry.
- Ignoring fabricator drill, aspect ratio, and plating capability.
- Checking via current but forgetting surrounding plane neckdowns.
When the approximation breaks down
- Via thermal behaviour depends on board stackup, plating, surrounding copper, airflow, and neighbouring heat sources.
- High-current or high-reliability designs should be checked with fabricator rules and, where needed, measurement or simulation.