Pull-up resistor value trade-offs for logic inputs
A pull-up resistor is not just a default value. Too low wastes current; too high can be slow, noisy, or vulnerable to leakage.
How do you choose a pull-up resistor value?
Choose a value low enough to overcome leakage and meet rise-time needs, but high enough that the pulling device can meet the required logic-low voltage and current limit.
Model summary
- Sink current when low: I = (Vpullup - Vol) / Rpullup.
- Resistor power when low: P = I^2 * Rpullup.
- Rise time depends on pull-up resistance and total capacitance, so static sizing is only part of the check.
Worked example
For a 3.3 V pull-up, target low voltage of 0.4 V, and 1 mA allowed sink current, R = (3.3 V - 0.4 V) / 1 mA = 2.9 kOhm.
A standard value near 3.0 kOhm gives about 0.97 mA low-state current.
Power is roughly 0.97 mA squared times 3.0 kOhm, or about 2.8 mW.
Practical sequence
First satisfy the low-level current and voltage limit. Then check leakage and noise margin. For buses or fast edges, check RC rise time separately.
Common mistakes
- Choosing 10 kOhm everywhere without checking leakage or rise time.
- Choosing a very low pull-up that exceeds the open-drain device sink-current limit.
- Ignoring bus capacitance on long traces, cables, or multi-drop nets.
When the approximation breaks down
- This static model does not guarantee I2C or other bus timing. Rise-time checks need capacitance and protocol limits.
- Input leakage, temperature, ESD structures, and powered-down devices can change the effective pull-up behaviour.