Ideal vs loaded voltage divider behaviour
An unloaded divider is only a starting point. The real output changes when the next circuit stage draws current or presents finite input resistance.
When does a voltage divider stop behaving like the ideal two-resistor equation?
A divider stops matching the ideal equation when the load resistance is not much larger than the lower divider resistor. The load sits in parallel with the lower resistor, reducing the effective resistance and pulling the output lower than the ideal value.
Model summary
- Ideal divider: Vout = Vin * R2 / (R1 + R2).
- Loaded divider: replace R2 with R2 parallel Rload, then calculate Vout from that equivalent resistance.
- Loading error is the difference between ideal Vout and loaded Vout, often expressed as volts or percent.
Worked example
For Vin = 5 V, R1 = 10 kOhm, and R2 = 10 kOhm, the ideal output is 2.5 V.
If a 10 kOhm load is connected to the output, the lower leg becomes 10 kOhm parallel 10 kOhm = 5 kOhm.
The loaded output becomes 5 V * 5 kOhm / (10 kOhm + 5 kOhm) = 1.667 V, not 2.5 V.
Practical rule of thumb
Make the load resistance much larger than the divider output resistance if you want the ideal equation to remain a good approximation. For precision work, calculate the loaded result instead of relying on a rule of thumb.
Common mistakes
- Using the ideal divider equation for an ADC input without checking sampling/input impedance.
- Choosing very large divider resistors to reduce current, then forgetting leakage and input bias currents.
- Checking output voltage but ignoring resistor power and source impedance.
When the approximation breaks down
- The simple loaded-divider model assumes a resistive load. Sampled ADC inputs, switched-capacitor inputs, and bias networks may need a dynamic model.
- High-value dividers can be affected by leakage, contamination, input bias current, and noise pickup.