Engineering guide

RC filter and timing workflow

First-order RC design questions often sound different - delay, cutoff, coupling, discharge, reset timing - but they are connected by the same resistor-capacitor behaviour.

Reviewed 4 July 2026

Quick answer

How should you move through an RC timing or filter check?

Start with the time constant when the question is charge or delay, move to the low-pass or high-pass form when the question is filtering or coupling, then check discharge timing, startup behaviour, and component limitations before treating the result as final.

Model summary

Core equations

First-pass model summary

Use these equations, assumptions, and variables as the shared model behind the guide before moving to the worked example and linked calculators.

RC time constant

τ = R \times C

First-order cutoff frequency

f_{c} = \frac{1}{2 π R C}

Settling to threshold N τ

v (t) = V_{final} \times (1 - e^{- t / τ})

Capacitor voltage during charging from zero through a series R.

Variables and natural units

These symbols match the guide equations and use the same engineering-unit conventions as the linked calculators.

`τ`: Time constant

Unit: s

RC product; sets both the time-domain response and the frequency-domain −3 dB point.

`R`: Resistance

Unit: Ω

Effective resistance seen by the capacitor.

`C`: Capacitance

Unit: F

Capacitor value in the RC network.

`f`_c: Cutoff frequency

Unit: Hz

−3 dB point of the first-order RC filter.

`V`_final: Final voltage

Unit: V

Target voltage the RC charges toward; typically the supply voltage.

Model boundary

Time constant: τ = R × C.
First-order cutoff: fc = 1 / (2 × π × R × C).
The same RC pair can describe delay, settling, filtering, coupling, or bleed timing depending on the question being asked.
Real capacitors bring tolerance, ESR, leakage, voltage coefficient, and dielectric behaviour that the ideal equations do not include.

Worked example

10 kΩ, 100 nF - filter and timing check

This example extracts time constant, cutoff frequency, and 5τ settling time from a single RC pair.

Inputs

R: 10 kΩ
C: 100 nF

Equation and substitution

τ = R \times C = 10 kΩ \times 100 nF = 1 ms

f_{c} = \frac{1}{2 π τ} = \frac{1}{2 π \times 1 ms} \approx 159 Hz

t_{settle} = 5 τ = 5 \times 1 ms = 5 ms

Time constant

τ = 1 ms

Cutoff frequency

f_c ≈ 159 Hz

5τ settling time

t_settle = 5 ms

Calculator workflow

Work through these calculators in order for a complete first-pass check.

Choose the equation from the design question

Use τ when the question is delay, charge, discharge, or settling. Use cutoff frequency when the question is bandwidth, smoothing, or coupling. The physical parts may be identical, but the useful design view depends on what the circuit must do.

First-order assumptions still need real-component review

Even a simple RC network can shift in practice because the capacitor value changes with tolerance, temperature, ageing, dielectric, and DC bias. Source impedance, load impedance, and leakage also alter the effective resistance and therefore the result.

Common mistakes

Treating time constant, cutoff frequency, and discharge timing as unrelated checks.
Using the visible resistor value instead of the effective resistance seen by the capacitor.
Assuming ideal capacitor value without checking tolerance, DC bias, leakage, or startup behaviour.

When the model breaks down

This workflow is first-order only and does not replace multi-pole filter design, op-amp stability review, or detailed transient simulation.
Real component limitations such as ESR, ESL, dielectric absorption, voltage coefficient, and leakage can dominate the final behaviour.

Further checks and references

Verify the effective resistance seen by the capacitor from the full source, load, and bias network rather than a single visible resistor value.
Check capacitor tolerance, DC bias behaviour, leakage, polarity, and startup conditions before freezing the part choice.
Use simulation or measurement if the path includes multiple poles, amplifier loading, or resonant behaviour.

Stylised resistor-capacitor circuit with a timing dial

Next check

RC time constant calculator

Start with time-domain RC behaviour.

Stylised resistor-capacitor coupling network

Next check

AC coupling capacitor calculator

Extend the workflow into coupling-corner checks.

Hub

Analogue and filter calculators

Return to the analogue hub for related timing and filter checks.

FAQ

How do I choose between time constant and cutoff frequency?

Use time constant when the question is delay, settling, charging, or discharge behaviour. Use cutoff frequency when the question is signal bandwidth, attenuation, or filtering. The same R and C produce both, and neither replaces the other.

Can the same component values serve as both filter and timing network?

Yes. The same R and C network can be described as a high-pass or low-pass filter from a frequency-domain perspective, or as a delay and settling network from a time-domain perspective. The design question determines which view is useful.

Does source impedance affect the RC behaviour?

Yes. The effective resistance is the Thévenin resistance seen by the capacitor from all sources, which may include source, load, and bias resistors. Using only a single explicit resistor value gives the wrong time constant or cutoff if other resistances are significant.

RC filter and timing workflow

How should you move through an RC timing or filter check?